![]() ![]() |
||||
|
||||
Virtual Prototypes Cut Software Bottleneck As the software content in today's 2.5G and 3G phones rapidly increases, timely software development is becoming critical for product success. The traditional development flowin which software design isn't started until after hardware design is complete or nearly completesimply breaks down. The resulting design cycle is too long for the competitive wireless market. In addition, dealing with the hardware-software interaction after most of the hardware has been defined can yield... — Thomas Anderson , et al. January 2005 [News] High-Powered Collaborators Produce Low-Powered SoC Demo For next-generation wireless devices, longer battery life is a top-echelon design goal. But achieving that goal often requires expertise in multiple technology domains. Few if any single organizations possess such expertise. As a result, ARM, Artisan Components, National Semiconductor, Synopsys, and UMC have decided to funnel their individual technology strengths into a collaboration. The companies will deliver a comprehensive low-power, energy-efficient, system-on-a-chip (SoC) technology... — Lisa Maliniak January 2005 [New Products] Reconfigurable DFM Tools Bring Closure To OPC The Halo suite of DFM tools from Aprio Technologies delivers a new answer to the thorny problems that come with chip-design respins. It also promises to help the designs that need optical-proximity-correction (OPC) modification to solve yield issues or the modified designs that require a quick change to mask data (also called ECOs). Aprio's Reconfigurable OPC Technology enables Halo to reconfigure an OPC'd layout for a new, optimized OPC result. Such a result can deliver huge performance... — Lisa Maliniak November 2004 [Design Application] RF And Digital Tests Unite Against BER In today's wireless-receiver architecture, an evolving trend places the digital-signal-processor (DSP) subsystem closer to the radio-frequency (RF) antenna. This trend highlights a need for innovative RF/digital-verification solutions. Many... — Scott Ferguson , et al. November 2004 [New Products] DSP Goes From Algorithm To Implementation To implement algorithms, digital-signal-processing (DSP) developers have had to rely upon design flows that use manual approaches. Aside from being time consuming, the manual process can invite errors. To enable faster and more efficient DSP design... — Nancy Friedrich November 2004 [New Products] Interconnect Manages Power And Data Flow As systems-on-a-chip (SoCs) bring more functionality onto the chip itself, data flow becomes a daunting issue. To confront this design problem, Sonics, Inc. has come out with the SonicsMX solution. The goal of SonicsMX is to enable the design of... — Nancy Friedrich October 2004 [News] SoC Design Gains Flexibility For The Future Don't let the innocuous title of this book fool you. Chris Rowen, President and CEO of Tensilica, has prepared a technically accurate but accessible work that explains why the systems-on-a-chip (SoCs) of tomorrow won't be designed like today's SoCs.... — John Blyler October 2004 [Special Report] FPGAs And Virtual Prototypes Share Common Design Space Much has been written about the rise of field-programmable-gate-array (FPGA) -based platforms over application-specific-integrated-circuit (ASIC) implementations. During the last few years, FPGAs have certainly increased their size and performance... — John Blyler October 2004 [Product Features] Tool Helps Designers Find Interface Parasitics As nanometer design projects become more commonplace, the side effects of shrinking process geometries also will grow familiar. The emergence of significant interconnect parasitic elements is chief among these effectsespecially for 90-nm... — John Blyler July/August 2004 [News] Solution Aligns ICs And Their Packages With the continued rise of densities and I/O counts, integrated-circuit (IC) packages face a multitude of demands. If they don't satisfy these needs, the packages could stand in the way of IC progress. In fact, the semiconductor industry's move to... — Nancy Friedrich July/August 2004 [News] 3D EM Simulation Goes Mainstream Instead of competition and dirty dealings, recent cutbacks and smaller staffs have often led to cooperative partnerships between different companies. By sharing, co-developing, and integrating their products, companies are spawning innovations that... — Nancy Friedrich July/August 2004 [Cover Story] Software Drives Ultra Wideband Home Ultra Wideband (UWB) is used to transmit digital data over a wide spectrum of frequency bands with very low power. This wireless technology can carry huge amounts of data over a short distance. Thankfully, UWB is not prone to the signal... — Cheryl Ajluni July/August 2004 [New Products] ESL Tool Enables Modeling And Verification The promise of electronic-system-level (ESL) design tools rests on their top-down approach to development. In an ideal environment, engineers would easily model complex systems while maintaining full support for the C/C++ and hardware description... — Staff June 2004 [Product Features] FPGA Prototyping Tool Aligns With ASIC Flow Over a third of all high-end ASIC designers now use FPGAs for prototyping 500,000-plus-gate designs. Driving this trend is the fact that a median application-specific integrated-circuit (ASIC) design can now fit onto the largest field-programmable... — John Blyler June 2004 [Product Features] ESL Tools Enable Early Software Development Software development is the critical link in the development of today's embedded wireless applications. Some estimates place software creation at 50% to 70% of overall product-development costs. To remain competitive, wireless designers must be able... — John Blyler May 2004 [Design Application] Co-Verify To Optimize Your Embedded Design As the capabilities of wireless networks improve and become more sophisticated, the expectations and desires of wireless-device users seem to grow exponentially. The result is an ever-increasing demand for better levels of service and performance... — Jim Kenney May 2004 [Design Application] Co-Verification In Action In an ASIC design for a satellite ground receiving station, Hughes Network Systems encountered a problem. Its device was designed to receive packets that were transmitted from a satellite. It would then convert those packets to Internet Protocol... — Jim Kenney May 2004 [Design Application] New Technology Spurs Performance Optimization During the latter stages of embedded-systems design, engineers may want to analyze the effect of shifting functions from software to hardware. Such analysis helps them achieve greater efficiency and performance. Up until now, lengthy handcrafted... — Jim Kenney March 2004 [Product Features] High-Level Abstraction Comes Into Tool's Grasp Despite the economic downturn of the last two years, the electronic-system-level (ESL) design and verification markets continue to evolve. This fact proves the importance of system-level development software for the electronic-design-automation (EDA)... — John Blyler March 2004 [News] Integrated Platform Speeds Verification Design teams must spend a lot of time and resources verifying their chip or system designs. This added pressure is fueling the search for true electronic-system-level (ESL) verification. So far, electronic-design-automation (EDA) companies are taking... — Nancy Friedrich |
||||||
|
|
||||||
|
|
Electronic Design Europe Electronic Design China EEPN Microwaves & RF Schematics ![]() Electronic Design Military Electronics Featured Vendors EE Events Free Design Resources |
|
|
Planet EE Network Home |
Contact Us |
Editorial Calendar |
Media Kit |
Headlines |
Site Feedback & Bugs Copyright © 2010 Penton Media, Inc. Legal | Privacy Statement Terms of Use |