MEMORY WORKSPACE
To complete the comparison of the memory architectures, the characteristics of the workspace memory must be reviewed. Initially, SRAM was used for cellular handsets. Now, it's rapidly being replaced by PSRAM in conventional architectures. With the development of low-power SDRAM, PSRAM's higher performance and low cost have made it an attractive alternative.

Low-power SRAM is very popular because data in a cell can be kept statically without the external refresh operations. Plus, battery life is an important criterion for mobile products. At 5-µA standby current, the very low power consumption of SRAM is very helpful to designers.

An SRAM memory cell is equivalent to a flip-flop latch circuit, which is composed of four or six transistors per cell. As a result, SRAM has a relatively bigger chip size. This size affects the cost per bit. To address this matter, memory vendors have developed Pseudo SRAM (PSRAM).

PSRAM comprises a DRAM memory cell, which has one transistor and one capacitor per cell. This design enables PSRAM to achieve a lower cost per bit. It also integrates a refresh-control circuit. As a result, the system doesn't have to manage complicated refresh operations. PSRAM is available with similar access times as SRAM (typically 65 ns and faster random-access times). To achieve higher performance, PSRAM also supports Page mode and Burst mode.

PSRAM offers the advantages of lower power consumption and lower standby current. LP SDRAM, on the other hand, is faster. It boasts speeds of 83 to 133 MHz compared to the 65-ns asynchronous access read for PSRAM. Compared to 128 Mb for PSRAM, LP SDRAM also is available in higher densities—up to 512 Mb today.

In the PC market, synchronous DRAM (SDRAM) is a very popular technology. Many processors support this interface, which can perform at frequencies of 133 MHz or above. To support many additional features, cellular phones are beginning to use higher-performance memory products. Power-consumption-wise, greater than 100 MHz is overkill for cell-phone systems now. But new features in future phone systems may need the high performance of random-access memory (RAM), such as Burst PSRAM or low-power SDRAM.

To select the optimal configuration for a cell-phone memory subsystem, designers must balance tradeoffs in cost, performance, power consumption, density, and availability. That way, they can best fit the requirements of a specific design. In general, memory requirements in high-end cellular handsets have increased dramatically to support new applications. As a result, multiple types of memory are needed to address the phone's code storage, working memory, file, and additional application-storage requirements.

To meet the space constraints of today's ever-smaller handsets, many manufacturers have turned to multi-chip packages. They can then obtain a complete memory subsystem in a single component. Today, traditional NOR+SRAM memory solutions for cell phones are being replaced by NOR+PSRAM+NAND solutions. A new architecture using NAND+LPSDRAM now offers advantages in both cost and speed.

Toshiba America Electronic Components, Inc.
9775 Toledo Way, Irvine, CA 92618; (949) 455-2000, www.toshiba.com/taec.