Advanced Search | Help

  HOME     |    TOPICS     |    BACK ISSUES     |    EVENTS     |    NEWS    



  
Reprints & Linking Info   Printer-Friendly    Email this Article        Font Size     What's This?


[Show Coverage]
DUC And Enhanced FEC Arrive At The FPGA Core

John Blyler
February 2004

1) Misconceptions About Wireless Broadband Abound  90
2) Hack Your Way To WLAN Security  39
3) Unrealistic Expectations Threaten WiMAX's Success  34
4) Locked Your Keys In The Car? Get Out Your Cell Phone  29
5) Are Satellite-Broadband Systems Internet-Ready?  28
ALL TOP 20 >>

As major analysts predicted, FPGAs are continuing to expand into traditional ASIC and DSP markets. To take advantage of this growth, Xilinx is now offering a digital-upconverter (DUC) LogicCore module along with enhanced forward-error-correction (FEC) cores for digital communication-system design. This step extends the company's coverage from baseband-processing applications to signal generation for digital intermediate-frequency (IF) subsystems. Having these functions in one FPGA should give users greater flexibility in their wireless designs.

The new DUC core is included with the Xilinx ISE software. Multiple DUC cores can be added to a single FPGA, thereby increasing the level of integration. Typical targets for DUC cores include software-defined radios; digital transmitters; cable modems; BPSK, QPSK, and QAM modulators; spread-spectrum communication systems; and CDMA2000 and 3G base stations. Filter lengths for the DUC core are selectable between 4 and 1024 taps. Designers can define coefficient precision from 4 to 32 b. The DUC core has been designed for use with Xilinx's System Generator for DSP software platform systems.

As mentioned, the company also announced enhanced forward-error-correction cores. They include a Reed-Solomon core that supports ITU-T J.83 variable block length and multi-channel capability. An enhanced convolutional interleaver core also is ready. It supports selectable configurations on the fly. In addition, the CDMA2000/3GPP2 Turbo Convolutional Codec (TCC) solution—which was announced as a beta product in July 2003—is now available as a production solution. These cores are part of the company's DSP intellectual-property (IP) offerings, which are used extensively in wireless and wireline communication systems.

The DUC LogicCore module and enhanced FEC cores are all available now. The DUC core is included with the latest version of the Xilinx CORE Generator System. The Reed-Solomon, Interleaver, and TCC cores are available as separately licensed parameterized netlists. Full-system hardware-evaluation versions of the Reed-Solomon and Interleaver cores also are available. All of the cores support the latest Xilinx Virtex and Spartan Series FPGAs and ISE 6.1I design software.

Xilinx, Inc.
2100 Logic Dr., San Jose, CA 95124-3400; (408) 559-7778, FAX: (408) 559-7114, www.xilinx.com.

See associated figure





[Reader Comments]
DUC And Enhanced FEC Arrive At The FPGA Core

Name (required):moc
- Submitted On: December 23, 2006
Tell us what you think - post your comments here.

READER COMMENTS:
We want to hear what you have to say about this article!



Enter the text from the image below


Please refresh the page if you have trouble reading this text.

     
Your email is only used if our editors need to contact you.
Connection Failure



PartFinder

Find real-time pricing, stock status, same-day/next-day shipping options and more. Brought to you by Digi-Key. Go to PartFinder.    
GlobalSpec

PART SEARCH :
Powered by: GlobalSpec - The Engineering Search Engine
Sponsored Links

Electronic Design Europe Electronic Design China EEPN Microwaves & RF Schematics
Electronic Design Military Electronics Featured Vendors EE Events Free Design Resources



Planet EE Network Home | Contact Us | Editorial Calendar | Media Kit | Headlines | Site Feedback & Bugs
Copyright © 2008 Penton Media, Inc., All rights reserved. Legal | Privacy