The path to real-time wideband channelization is camouflaged by different techniques. Among the competing approaches are Pipelined FFT, polyphase DFTs, multiple digital downconverters (DDCs), and both the Pipelined Frequency Transform (PFT) and its derivative—the tunable PFT (TPFT). When selecting a technique, remember that the main objective is to establish the optimum solution for different application types. Currently, high-speed analog-to-digital converters (ADCs) are available off-the-shelf with conversion rates of up to 1.5 GSamples/s (e.g., the Maxim MAX108). Their dynamic range is constantly improving as well. However, the problems really start with the area of signal processing that resides immediately after the ADC.

Typically, processing at this stage involves frequency conversion and channelization. Standard digital-downconverter technologies do exist for the selection of narrowband channels from a medium-bandwidth spectrum (e.g., Conexant, which was formerly Globespan Virata; TI-Graychip; and Analog Devices). But they're limited to only a few simultaneous channels for an economical amount of silicon.

Alternative technologies do exist that require the spectrum to be channelized into equally spaced, equal-bandwidth channels. Among them is the FFT, where channel filter performance isn't too critical. Another example, polyphase DFT, provides higher-performance filters.

By using pipelining architectures, real-time multichannel performance can be achieved in a practical amount of silicon. Yet real-world situations often require channels of non-equal width and spacing along with time-varying channel plans. This statement applies to multistandard mobile base stations, software-defined radios (SDRs), and satellite communications. Additional demands are spawned by monitoring, instrumentation, and surveillance activities. Often, such activities create a need to observe signals in different resolution bandwidths—sometimes simultaneously.

This article compares the main competing techniques for real-time, wideband channelization. It focuses on the basic techniques that provide multiple channels from a broad band for further processing, such as demodulation or signal detection. The architectures discussed here are generally biased toward being implemented in hardware, such as field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). In terms of multiply/accumulate operations (MACs), the required processing power is very high. In most cases, it's very much in excess of the peak MAC performance of today's programmable DSPs. The most difficult aspect to overcome is the memory bandwidth requirements of a wideband, real-time system. For high-end specifications, it's not clear how this bandwidth could be achieved without using a totally impractical number of DSPs.

Digital downconverters (DDCs)
Digital downconverters are well established as a technique. Using custom or standard cores, this approach is relatively straightforward to implement in FPGAs. In cases that require only a few channels (typically 4 to 8) to be selected from the broad band, such a solution is quite efficient. It also proves to be very flexible. Each channel can be independently configured for center frequency, bandwidth, and filter response. For larger numbers of channels, however, the logic and more particularly the memory requirements become excessive.

Fast Fourier Transform (FFT)
The Fast Fourier Transform and its real-time pipelined implementation also are well-known techniques. The FFT provides a very economical solution to the channelization problem. It's especially well suited to scenarios in which a large number of channels are required, but the channel filter performance isn't too critical. Generally, the FFT is restricted to cases that require channels with even frequency spacing and equal filtering.

WOLA and polyphase-DFT filter banks
To achieve an improvement in filtering performance, don't just use the "windowing" of time data. Utilize polyphase filter banks ahead of the FFT. This technique, which is generally called Weight Overlap and Add (WOLA), has a subset: the polyphase DFT. This approach is gaining recognition. It's very efficient when large, high-quality filter banks are required. Like the FFT, however, it's generally restricted to cases that require evenly spaced channels with equal filtering.

Pipelined Frequency Transform (PFT)
The PFT processing form takes a different approach. Based on a "tree" structure, it successively splits and filters the frequency band to achieve a finer and finer resolution of the broad band. The time interleaving of common processes can lead to a very efficient structure. One of its advantages is that it makes simultaneous outputs available from successive stages. These stages are at different frequency resolutions. PFT also offers the ability to independently tailor the filters for different frequency bins. If certain frequency bins or blocks of spectrum aren't required, it's easy to exclude them from the processing. The result is greater efficiency.

Tunable PFT (TPFT)
In its simplest form, the PFT mentioned above still produces equally spaced frequency bins. To overcome this limitation, a derived form may be used. Known as the TPFT, it allows the independent tuning of the center frequency of all bins. It also permits independent filters for each bin. Because of the availability of different stage outputs with varied frequency resolutions, the end result is like having the flexibility of the DDC approach. At the same time, the designer gains the efficiency of the PFT. This efficiency is vital for a larger number of channels.

To really understand the implications of choosing between these approaches, it's necessary to examine each technique in more detail. For example, look at the general architecture of a typical DDC (FIG. 1). Although there are many variants of this design, the principle is broadly the same in each case. The input can be complex or real. For this discussion, assume a complex input. The broad-band input signal is frequency shifted up or down to center the required narrowband channel on zero frequency. This step is achieved using a complex local oscillator. That oscillator is some form of numerically controlled oscillator (NCO). It also is a complex mixer which, in its basic form, comprises four complex multipliers and two adders. The complexity of the NCO will depend on the final frequency-setting accuracy that's required as well as the system's spurious-free dynamic range (SFDR).

Next, low-pass filtering extracts the required channel. That channel may consist of any combination of Finite Impulse Response (FIR) or Infinite Impulse Response (IIR) filters. Typical examples of these filters include the cascaded integrator comb (CIC), half-band, and decimating FIR. For the simple analysis presented here, assume a multi-stage CIC followed by a decimating FIR.

It's normal to perform some of the decimation in the FIR filters. This is partly because very high decimation factors in the CIC require significant bit growth in the CIC components. It's also partially done to avoid having alias sidelobes spoil the stop-band response. To achieve adequate passband flatness in the DDC, the FIR filter also may need to compensate for rolloff in the CIC passband. The typical performance of a single DDC is shown in Figure 2.

CIC filters permit high-rate signal decimation or interpolation. And by eliminating the need for multipliers, they use a very compact architecture.¹ The two basic building blocks of a CIC filter are an integrator and a comb. The integrator or accumulator is simply a single-pole IIR filter with unity feedback coefficient. A typical comb filter behaves as a high-pass filter with a 20-dB-per-decade gain (FIG. 3).

Building a CIC filter involves cascading N integrators with N combs. They are followed by a decimate-by-R block. Although such a scheme works, it can be greatly simplified by placing the comb after the decimator. In general, a CIC filter would have N integrator/comb pairs with N typically ranging from 3 to 6. A three-stage CIC is schematically illustrated in Figure 3.