The furious pace of WLAN announcements is almost drowning engineers. Because they're being inundated with so much information, it's hard for engineers to separate marketing hype from technical fact. Yet certain truths do exist. For example, the WLAN market will no longer be dominated by PC-based products. Increasingly, it's going to be driven by A/V and consumer-media devices. Examples of these devices include flat-panel-TV screens, PDAs, and Voice over IP (VoIP) phones. Of the 160 million WLAN devices that are expected to ship in 2006, 60% will be attributed to A/V and consumer-media devices. The 802.11a-based WLAN market also is expected to experience rapid growth. From 6.1 million units in 2003, it's estimated to reach 83.9 million units in 2007. One problem could unravel this prediction, however. High power consumption and limited performance continue to act as barriers to the adoption of 802.11a-based systems.

Fortunately, the Canadian-based IceFyre Semiconductor Corp. may have found a way to tame these issues. Its answer—the SureFyre chip set—is firmly rooted in sound engineering practices. It's characterized by more than 30 patents, which cover everything from the system architecture to the digital, mixed-signal, and analog-circuit designs. This full system solution delivers greater performance, power efficiency, and system flexibility than other currently available offerings. And it does so at a competitive cost.

According to the company, these claims translate into 50% better power consumption than traditional systems running at 1.5 W and higher. The chip set also boasts a 2X output-power improvement and much greater linearity. These strengths should empower SureFyre to meet the requirements of the next-generation, high-growth WLAN-equipment markets.

The SureFyre solution for IEEE 802.11a WLAN is comprised of three parts: the ICE5125 low-power, fully featured CMOS 802.11 media-access-controller (MAC) IC; the ICE5351 integrated CMOS baseband radio-frequency IC (RFIC); and the ICE5352 high-efficiency GaAs Class-F power amplifier/Chireix combiner (FIG. 1). The ICE5351 is a 5-GHz Orthogonal Frequency Division Multiplexing (OFDM) PHY. In creating this solution, IceFyre integrated full digital and analog circuitry onto a single chip. Its integration of a high-performance 5-GHz radio on the same die as full-featured baseband-processing logic is a first for the company. The future integration of MAC functionality is dependent only upon market demands.

In contrast, the ICE5352 5-GHz OFDM power amplifier (PA) was spawned out of partitioning. Specifically, it is derived from the partitioning that can be realized when an external GaAs PA—thanks to its higher carrier mobility—acts as a companion chip to the ICE5351 PHY. With this partitioning, the final stages of a PA can be realized as a separate GaAs die. The ICE5352 Class-F PAs and Chireix combiners achieve over 35% efficiency. They maintain a 300% efficiency advantage over class AB PAs from 40-to-200-mW RMS RF output levels.

Sophisticated hardware/software partitioning also gave way to the ICE5125 MAC. Partitioning enables this MAC to have low power and flexibility. The MAC provides flexible support for 802.11a/d(draft)/h(draft)/i(draft) and quality of service (QoS). Its scalable architecture can support data rates up to 174 Mbps.

From the MAC + PHY (baseband + RF) partitioning of the SureFyre solution, designers gain maximum design flexibility. Utilizing full chip sets, the partitioning supports the implementation of complete systems. It also supports PHY-only solutions, which interface with em-bedded host-based MAC technology or proprietary MAC ICs.

To detail its other features, the SureFyre solution delivers over 200-mW RMS RF output power. Its receive sensitivity is up to 10 dB better than the 802.11a specification. It boasts a transmit-signal linearity that's up to 2 dB better than the 802.11a specification. Reference designs based on the SureFyre solution promise to achieve greater range at all data rates. This claim even holds true for a range of more than 40 m at 54 Mbps. In addition, the solution features a 150-ns delay-spread multipath tolerance. Such tolerance provides fade-free support for demanding multimedia applications.

The peak chip-set power consumption is just under 720 mW. The sleep and idle power modes are 5 mW and 117 mW, respectively. With this combination of low peak power consumption and aggressive power management, high-data-rate WLAN operation can be enabled in power-constrained applications. Among these applications are ultra-portable handheld devices and Power-over-Ethernet infrastructure equipment.

At the heart of the SureFyre chip set lies a host of innovative engineering practices coupled with a unique chip architecture. The first innovation, dubbed FyrePower, is a series of computational engines. One of these engines—the Light Clipper—limits the peak-to-average power ratio (PAPR) of the OFDM signal to an acceptable level. The second engine, the Phasor Fragmentor, deconstructs the OFDM transmit signal into multiple, constant envelope signals with 0-dB PAPR. These two engines, working with the ICE5352 PA, solve the performance and power-efficiency deficiencies of traditional 802.11a modem designs.

Among the other engines is the Adaptive Predistortor, which im-proves transmit-signal linearity while reducing out-of-band emissions. All of these engines are included in the ICE5351 PHY. Thanks to them, the ICE5352 PA chip can be realized as Class-F amplifiers in a Chireix combining architecture.